Image Processing Toolbox deployed on FPGA Hardware

Jan ‘24 - Apr ‘24, IIT Gandhinagar

• Established UART communication between FPGA board and a machine to serially transmit and recieve Binary data on BRAMS. Used python IDE to send/recieve data and xilinx’s Vivado for deployement of code on FPGA board.
• Applied various convolution filter (smoothening/sharpening/gaussian) on the given image. Set up a smooth pipeline to finally get an enhanced image. Achieved optimal ratio for speed vs space trade-off.

Github Repo Link : Github
Group Members:

• Abhinav Goud
• Hrriday V. Ruparel
• Sujal Patel